This is coincidentally the same CPU that will be powering the Aurora supercomputer at Argonne National Laboratory. These will also be sent to Los Alamos National Laboratory and Kyoto University.  Intel also states that the integration of HBM memory will require no code change and should be seamlessly transparent to the end-user. The 56 cores, formerly codenammed Sapphire Rapids, are constructed out of four tiles and connected using Intel’s multi-die interconnect bridge (EMIB). 64GB of HBM is present in the package and the platform will feature PCIe 5.0 and CXL 1.1 I/O.

68% less power usage than an AMD Milan-X cluster for the same HCPG performance. AMX extensions boost AI performance and deliver 8x peak throughput over AVX-512 for INT8 wth INT32 accumulation operations. Provides flexibility to run in different HBM and DDR memory configurations. Workload benchmarks:

Climate modeling: 2.4x faster than AMD Milan-X on MPAS-A using only HBM. Molecular dynamics: On DeePMD, 2.8x performance improvement against competing products with DDR5 memory.

So let’s talk a bit about performance as well. Intel is claiming a massive 5x performance uplift in some workloads when compared to older Intel Xeon 8380 series processors or AMD EPYC 7773X. It is worth noting that AMD is announcing their Genoa based CPUs tomorrow so the TCO analysis can begin in earnest then. Intel’s new CPUs also contain 20 Accelerator Engines for AVX-512, AMX, DSA and Intel DL Boost workloads. In fact, Intel is boasting a performance uplift of 3.6 times over AMD’s 7763 and 1.2x over NVIDIA’s A100 in MLPerf DeepCAM training. The new Max CPU line will be landing in 2023 to take on AMD’s Genoa. It had been rumored that AMD was also considering HBM versions of its upcoming Genoa CPUs but if they have not - then it would give Intel a unique edge in memory bandwidth limited workloads. Intel Xeon Max CPUs will be debuting in the Aurora supercomputer (these started shipping to them a while ago), currently under construction at Argonne National Laboratory. Aurora is expected to become the first supercomputer to exceed 2 exaflops of peak double-precision compute performance. Aurora will also be the first to showcase the power of pairing Max Series GPUs and CPUs in a single system, with more than 10,000 blades, each containing six Max Series GPUs and two Xeon Max CPUs. The full slide deck revealed by Intel can be seen below:

Intel Announces The Worlds First x86 CPU With HBM Memory  Xeon Max  Sapphire Rapids  Data Center CPU - 5Intel Announces The Worlds First x86 CPU With HBM Memory  Xeon Max  Sapphire Rapids  Data Center CPU - 62